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Dinesh Venkitachalam

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Dinesh Venkitachalam
Gegend:
15230 Frankfurt Oder, Germany
Hochschulen:
 Hochschule Darmstadt (Microelectronics, Masters), Anna Unviersity (Electronics and Communications, Bachelor of Engineering)
Status:
Recent graduate/Student
Sprachen:
English (Fluent), German (Good knowledge), Indian languages Tamil, Malayalam, and Hindi
Berufserfahrung:
 IMEC,  (ASICs/SOC RTL, Statistical Timing Analysis, and Power estimations, Backend)
Ich suche:
Entry Level position in Research/Design and product development
Ich biete:
Design and Verification ASIC-RTL, Statistical Timing Analysis, Synopsys DC, Full Custom IC Design, Cadence mixed design flow, basics of Layout technique, calibre DRC/LVS, FPGA, Xilinx, Quartus II, microcontroller programing C and ASM, matlab, java, Tcl/Tk.
Interessen:
FPGA, ASIC design (analog and digital), Verification, Statistical Timing Analysis, IC-Design.